Maths compares two signals and outputs a gate when one exceeds the other via SUM-based subtraction

To compare signals A and B and gate when B > A: patch A to CH.2 Signal IN (Attenuvertor full CCW = inverted) and B to CH.3 Signal IN (Attenuvertor full CW). SUM equals B minus A. Patch SUM OUT to CH.1 Signal IN (not Trig IN). Set CH.1 RISE, FALL, response to minimum/linear. Patch a dummy cable to CH.1 first output (removes CH.1 from SUM). Gate from CH.1 EOR fires when SUM goes positive — i.e., when B exceeds A. This implements analog subtraction followed by threshold detection.

Examples

Signal A → CH.2 IN (Att full CCW). Signal B → CH.3 IN (Att full CW). SUM OUT → CH.1 Signal IN. CH.1 RISE+FALL at 0. Dummy cable in CH.1 first output. Gate from CH.1 EOR.

Assessment

In the two-signal comparator patch, why is a dummy cable inserted into CH.1 first output, and what happens to the gate if you remove it?