Maths inverts a logic gate signal using CH.4 Signal IN with EOC as the inverted output

The simplest Maths logic patch: patch any gate or logic signal to CH.4 Signal IN, and take the inverted output from CH.4 EOC. When the gate is high, CH.4 rises to track it; when the gate goes low, the EOC fires — effectively the gate complement. No additional parameter adjustment is required. This provides NOT logic from Maths without a dedicated logic module.

Examples

Gate from sequencer → CH.4 Signal IN. CH.4 EOC → trigger destination. When the gate is on, EOC stays low; when the gate ends, EOC fires a pulse.

Assessment

Describe the relationship between the input gate duration and the timing of the EOC output pulse in this inverter patch.